1. Field of the Invention
This invention relates to the field of circuit design. More particularly, this invention relates to the modelling of the power behaviour of a circuit.
2. Description of the Prior Art
The power consumption of electronic circuits is becoming an increasingly important performance parameter associated with the design of electronic circuits. As an example, in mobile devices the power consumption of the circuits will control the maximum operational time which may be obtained from a battery charge. Long operational time from a single battery charge is highly desirable. A further example of power consumption being an important characteristic relates to the cooling requirements of a circuit. A circuit which runs hot will tend to be less reliable and have a shorter life than one which runs cooler. While cooling mechanisms may be added to a device to compensate for hot running circuits, these have their own associated disadvantages such as weight and expense.
It is known to provide models of circuits before the actual physical circuits are available for testing. Such models may be used to validate the design and/or assist with the development of other parts of a system, such as other circuit elements which interact with the modelled circuit or software which executes upon the modelled circuit. In the context of such models, it is highly desirable that it is possible to model the power consumption of a circuit before the circuit is actually produced. This makes it easier to modify a circuit design in order to reduce the power consumption of that design. It also makes it possible to test software which will run on a circuit to determine if that software has characteristics which will produce an undesirably high power consumption, e.g. behaviour which results in inefficient use of the cache memories and the like.
FIG. 1 of the accompanying drawings illustrates a known methodology for modelling the power behaviour of a circuit. A circuit design may be specified by a collection of register transfer language data 2. Such register transfer language data representations of circuits are well known in the art and will not be described further. Known power modelling tools, such as those provided by Synopsis and Sequence, analyse the register transfer language data 2 and extract from it a large number of simplified power circuit elements having defined inputs and outputs and for which the power modelling tool determines the amount of energy which will be consumed when transitioning those circuit elements from one state to another. Such a collection of data defining the circuit elements in this way is assembled as a power library 4.
The register transfer language data 2 is also separately compiled into a register transfer language based model 6 which may be subject to stimulus signals 8 to simulate operation of the circuit. The stimulus signals 8 may, for example, be a sequence of program instructions to be executed upon a register transfer language model 6 representing a microprocessor. The tools for simulating the action of a register transfer language model 6 are also well known and will not be described herein further. The output of the simulation is a collection of state change data 10 which specifies changes in signal values within the circuit which occur at identified times.
With the power library 4 and the state change data 10, a power analysis tool 12 may then use these as inputs to generate power behaviour data 14. More particularly, the state change data 10 may be examined to determine signal value changes which occur and these then applied to the relevant circuit elements within the power library 4 with the amount of energy consumed to make such state changes being looked up for the power element concerned and accumulate across the various elements which make up the whole circuit and with time as the state change data progresses through the simulation.
Whilst the technique illustrated in FIG. 1 can produce accurate results, it suffers from the significant disadvantage that a required input to this methodology is detailed register transfer language data 2 which describes the circuit design at such a level that the power analysis tools can properly break the circuit down into individual elements with known power characteristics. From a commercial point of view, it is often the case that a circuit designer does not wish to release the register transfer language data 2 to other parties, and accordingly other parties cannot make use of the type of methodology illustrated in FIG. 1.
FIG. 2 of the accompanying drawings illustrates one known technique by which a circuit designer can release information to allow others to simulate the operation of a circuit. In particular, the circuit designer will translate the register transfer language data 2 into simulation platform data 16 which is an abstraction of the register transfer language data 2. This abstracted representation will behave the same as regards external stimuli, but will typically have a simplified internal structure whereby the simulation platform data cannot readily be reverse engineered to reveal commercially sensitive information regarding the register transfer language data 2.
The simulation platform data 16 may be compiled into a simulation model 18 which can then be subject to stimulus signals 8 and exhibit changes of its state (logged within state behavior file 17) corresponding to changes which would occur if the stimulus signals 8 had been applied to a model derived from the register transfer language data 2 or indeed the physical circuit being modelled itself. It will be appreciated that once the simulation platform data 16 has been compiled into the simulation model 18, that simulation model 18 may be used without reference to the simulation platform data 16 and accordingly a circuit designer may only need to release to circuit users the simulation model 18. Existing power modelling tools cannot operate upon the abstracted simulation model 18.
It is desired to provide the ability to model the power behaviour of a circuit but without having to reveal potentially commercially sensitive details concerning the circuit design.